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Home » 2015 August 25 » Intel Chipset Device Software version 10.1.2.10 WHQL
08:56 Intel Chipset Device Software version 10.1.2.10 WHQL | |
 Intel Chipset Device Software version 10.1.2.10 WHQL - The new version of drivers for Intel chipsets intended for proper operation and configuration of the chipset for the proper functioning of the AGP, IDE/ATA33/ATA66/ATA100, SATA, USB, Core PCI and other devices in the system, and their precise identification in Device Manager. Operating system: Windows 2000, Windows XP, Windows Vista, Windows 10, Windows 7, Windows 8, Windows Server 2003, Windows Server 2008.Info about the drivers: Name: Intel Chipset Device Software version 10.1.2.10 WHQL Release version: 10.1.2.10, 10.1.1.9 DriverVer = 08/07/2015, 10.1.2.10 Driver date: 07.08.2015 Release date: 17.08.2015 Operating system: Windows 7, Windows 8, Windows 8.1, Windows 10 Intel Chipset Device Software Support: - Intel® Xeon® Processor E5-2600 v3 product family - Intel® Xeon® Processor E5-2600 v4 product family - Intel® Xeon® processor E3-1200 v5 product family - Intel® Xeon® processor E3-1200 v4 product family - Intel® Xeon® processor E3-1200 v3 product family - Intel® Xeon® processor E3-1200 v2 product family - Intel® Atom™ Processor C2000 product family - Intel® Atom™ Processor S1200 product family - Intel® Xeon® Processor D-1500 product family - Intel® Communications Chipset 8900 Series - 6th Generation Intel® Core™ processor family - 5th Generation Intel® Core™ processor family - 4th Generation Intel® Core™ processor family - 3rd Generation Intel® Core™ processor family - 2nd Generation Intel® Core™ processor family - Intel® C230 series chipset family - Intel® C220 series chipset family - Intel® C210 series chipset family - Intel® C610 series chipset - Intel® C600 series chipset - Intel® Core™ M processor family - Intel® 100 Series chipset - Intel® 9 series chipset Supported Operating Systems: Microsoft Windows 2000 ; 9.4.0.1027, 9.4.4.1006 Microsoft Windows XP ; 9.4.0.1027, 9.4.4.1006 Microsoft Windows Server 2003 Microsoft Windows Server 2008 R2 Microsoft Windows 7 Microsoft Windows 8 Microsoft Windows Server 2012 Microsoft Windows 8.1 Microsoft Windows Server 2012 R2 Microsoft Windows 10 (only for Intel® Atom / Celeron / Pentium Processor) Microsoft Windows 10 x64  Devices supported: Intel NUC Board DCP847SKE Intel NUC Board DE3815TYBE Intel NUC Board NUC5i3MYBE Intel NUC Board D33217GK Intel NUC Board D34010WYB Intel NUC Board D53427RKE Intel NUC Board D54250WYB Intel NUC Kit DE3815TYKHE Intel NUC Kit DN2820FYKH Intel NUC Kit NUC5CPYH Intel NUC Kit NUC5i3MYHE Intel NUC Kit NUC5i3RYH Intel NUC Kit NUC5i3RYK Intel NUC Kit NUC5i5MYHE Intel NUC Kit D34010WYK Intel NUC Kit D54250WYK Intel NUC Kit DC3217BY Intel NUC Kit DC3217IYE Intel NUC Kit DC53427HYE Intel NUC Board NUC5i5MYBE Intel NUC Board D33217CK Intel NUC Board NUC5i7RYB Intel NUC Kit DCCP847DYE Intel NUC Kit NUC5i5RYH Intel NUC Kit NUC5i5RYK Intel NUC Kit NUC5i7RYH Intel NUC Kit NUC5PPYH Supported controllers: (a partial list) PCI\VEN_8086&DEV_0C50 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 0C50" PCI\VEN_8086&DEV_0C51 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 0C51" PCI\VEN_8086&DEV_0C52 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 0C52" PCI\VEN_8086&DEV_0C53 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 0C53" PCI\VEN_8086&DEV_6F00 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DMI2 - 6F00" PCI\VEN_8086&DEV_6F01 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 0 - 6F01" PCI\VEN_8086&DEV_6F02 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 1 - 6F02" PCI\VEN_8086&DEV_6F03 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 1 - 6F03" PCI\VEN_8086&DEV_6F04 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 2 - 6F04" PCI\VEN_8086&DEV_6F05 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 2 - 6F05" PCI\VEN_8086&DEV_6F06 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 2 - 6F06" PCI\VEN_8086&DEV_6F07 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 2 - 6F07" PCI\VEN_8086&DEV_6F08 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 3 - 6F08" PCI\VEN_8086&DEV_6F09 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 3 - 6F09" PCI\VEN_8086&DEV_6F0A = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 3 - 6F0A" PCI\VEN_8086&DEV_6F0B = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D PCI Express Root Port 3 - 6F0B" PCI\VEN_8086&DEV_6F0D = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Non - Transparent Bridge Registers - 6F0D" PCI\VEN_8086&DEV_6F0E = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Non - Transparent Bridge Registers - 6F0E" PCI\VEN_8086&DEV_6F10 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F10" PCI\VEN_8086&DEV_6F11 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F11" PCI\VEN_8086&DEV_6F12 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F12" PCI\VEN_8086&DEV_6F13 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F13" PCI\VEN_8086&DEV_6F14 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F14" PCI\VEN_8086&DEV_6F15 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F15" PCI\VEN_8086&DEV_6F16 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F16" PCI\VEN_8086&DEV_6F17 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F17" PCI\VEN_8086&DEV_6F18 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F18" PCI\VEN_8086&DEV_6F19 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F19" PCI\VEN_8086&DEV_6F1A = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F1A" PCI\VEN_8086&DEV_6F1B = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F1B" PCI\VEN_8086&DEV_6F1C = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Debug - 6F1C" PCI\VEN_8086&DEV_6F1D = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R2PCIe Agent - 6F1D" PCI\VEN_8086&DEV_6F1E = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Ubox - 6F1E" PCI\VEN_8086&DEV_6F1F = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Ubox - 6F1F" PCI\VEN_8086&DEV_6F20 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F20" PCI\VEN_8086&DEV_6F21 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F21" PCI\VEN_8086&DEV_6F22 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F22" PCI\VEN_8086&DEV_6F23 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F23" PCI\VEN_8086&DEV_6F24 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F24" PCI\VEN_8086&DEV_6F25 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F25" PCI\VEN_8086&DEV_6F26 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F26" PCI\VEN_8086&DEV_6F27 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology - 6F27" PCI\VEN_8086&DEV_6F28 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Address Map/VTd_Misc/System Management - 6F28" PCI\VEN_8086&DEV_6F29 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO Hot Plug - 6F29" PCI\VEN_8086&DEV_6F2A = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IIO RAS/Control Status/Global Errors - 6F2A" PCI\VEN_8086&DEV_6F2C = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D I/O APIC - 6F2C" PCI\VEN_8086&DEV_6F30 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Home Agent 0 - 6F30" PCI\VEN_8086&DEV_6F32 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 0 - 6F32" PCI\VEN_8086&DEV_6F33 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 1 - 6F33" PCI\VEN_8086&DEV_6F34 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R2PCIe Agent - 6F34" PCI\VEN_8086&DEV_6F36 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link 0/1 - 6F36" PCI\VEN_8086&DEV_6F37 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link 0/1 - 6F37" PCI\VEN_8086&DEV_6F38 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Home Agent 1 - 6F38" PCI\VEN_8086&DEV_6F39 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D IO Performance Monitoring - 6F39" PCI\VEN_8086&DEV_6F3A = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 2 - 6F3A" PCI\VEN_8086&DEV_6F3E = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link 2 - 6F3E" PCI\VEN_8086&DEV_6F3F = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link 2 - 6F3F" PCI\VEN_8086&DEV_6F40 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 2 - 6F40" PCI\VEN_8086&DEV_6F41 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link 2 - 6F41" PCI\VEN_8086&DEV_6F43 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 2 - 6F43" PCI\VEN_8086&DEV_6F45 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 2 Debug - 6F45" PCI\VEN_8086&DEV_6F46 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 2 Debug - 6F46" PCI\VEN_8086&DEV_6F47 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 2 Debug - 6F47" PCI\VEN_8086&DEV_6F50 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 6F50" PCI\VEN_8086&DEV_6F51 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 6F51" PCI\VEN_8086&DEV_6F52 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 6F52" PCI\VEN_8086&DEV_6F53 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QuickData Technology Registers - 6F53" PCI\VEN_8086&DEV_6F60 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Home Agent 1 - 6F60" PCI\VEN_8086&DEV_6F68 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Target Address/Thermal/RAS - 6F68" PCI\VEN_8086&DEV_6F6A = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Channel Target Address Decoder - 6F6A" PCI\VEN_8086&DEV_6F6B = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Channel Target Address Decoder - 6F6B" PCI\VEN_8086&DEV_6F6C = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Channel Target Address Decoder - 6F6C" PCI\VEN_8086&DEV_6F6D = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Channel Target Address Decoder - 6F6D" PCI\VEN_8086&DEV_6F6E = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 2/3 Broadcast - 6F6E" PCI\VEN_8086&DEV_6F6F = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Global Broadcast - 6F6F" PCI\VEN_8086&DEV_6F70 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Home Agent 0 Debug - 6F70" PCI\VEN_8086&DEV_6F71 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Target Address/Thermal/RAS - 6F71" PCI\VEN_8086&DEV_6F76 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link Debug - 6F76" PCI\VEN_8086&DEV_6F78 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Home Agent 1 Debug - 6F78" PCI\VEN_8086&DEV_6F79 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Target Address/Thermal/RAS - 6F79" PCI\VEN_8086&DEV_6F7D = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Ubox - 6F7D" PCI\VEN_8086&DEV_6F7E = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link Debug - 6F7E" PCI\VEN_8086&DEV_6F80 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 0 - 6F80" PCI\VEN_8086&DEV_6F81 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D R3 QPI Link 0/1 - 6F81" PCI\VEN_8086&DEV_6F83 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 0 - 6F83" PCI\VEN_8086&DEV_6F85 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 0 Debug - 6F85" PCI\VEN_8086&DEV_6F86 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 0 Debug - 6F86" PCI\VEN_8086&DEV_6F87 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 0 Debug - 6F87" PCI\VEN_8086&DEV_6F88 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6F88" PCI\VEN_8086&DEV_6F8A = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6F8A" PCI\VEN_8086&DEV_6F90 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 1 - 6F90" PCI\VEN_8086&DEV_6F93 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 1 - 6F93" PCI\VEN_8086&DEV_6F95 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 1 Debug - 6F95" PCI\VEN_8086&DEV_6F96 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D QPI Link 1 Debug - 6F96" PCI\VEN_8086&DEV_6F98 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6F98" PCI\VEN_8086&DEV_6F99 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6F99" PCI\VEN_8086&DEV_6F9A = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6F9A" PCI\VEN_8086&DEV_6F9C = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6F9C" PCI\VEN_8086&DEV_6FA0 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Home Agent 0 - 6FA0" PCI\VEN_8086&DEV_6FA8 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Target Address/Thermal/RAS - 6FA8" PCI\VEN_8086&DEV_6FAA = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel Target Address Decoder - 6FAA" PCI\VEN_8086&DEV_6FAB = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel Target Address Decoder - 6FAB" PCI\VEN_8086&DEV_6FAC = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel Target Address Decoder - 6FAC" PCI\VEN_8086&DEV_6FAD = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel Target Address Decoder - 6FAD" PCI\VEN_8086&DEV_6FAE = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 0/1 Broadcast - 6FAE" PCI\VEN_8086&DEV_6FAF = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Global Broadcast - 6FAF" PCI\VEN_8086&DEV_6FB0 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 0 Thermal Control - 6FB0" PCI\VEN_8086&DEV_6FB1 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 1 Thermal Control - 6FB1" PCI\VEN_8086&DEV_6FB2 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 0 Error - 6FB2" PCI\VEN_8086&DEV_6FB3 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 1 Error - 6FB3" PCI\VEN_8086&DEV_6FB4 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 2 Thermal Control - 6FB4" PCI\VEN_8086&DEV_6FB5 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 3 Thermal Control - 6FB5" PCI\VEN_8086&DEV_6FB6 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 2 Error - 6FB6" PCI\VEN_8086&DEV_6FB7 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 0 - Channel 3 Error - 6FB7" PCI\VEN_8086&DEV_6FB8 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 2/3 Interface - 6FB8" PCI\VEN_8086&DEV_6FB9 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 2/3 Interface - 6FB9" PCI\VEN_8086&DEV_6FBA = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 2/3 Interface - 6FBA" PCI\VEN_8086&DEV_6FBB = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 2/3 Interface - 6FBB" PCI\VEN_8086&DEV_6FBC = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 0/1 Interface - 6FBC" PCI\VEN_8086&DEV_6FBD = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 0/1 Interface - 6FBD" PCI\VEN_8086&DEV_6FBE = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 0/1 Interface - 6FBE" PCI\VEN_8086&DEV_6FBF = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D DDRIO Channel 0/1 Interface - 6FBF" PCI\VEN_8086&DEV_6FC0 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC0" PCI\VEN_8086&DEV_6FC1 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC1" PCI\VEN_8086&DEV_6FC2 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC2" PCI\VEN_8086&DEV_6FC3 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC3" PCI\VEN_8086&DEV_6FC4 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC4" PCI\VEN_8086&DEV_6FC5 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC5" PCI\VEN_8086&DEV_6FC6 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC6" PCI\VEN_8086&DEV_6FC7 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC7" PCI\VEN_8086&DEV_6FC8 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC8" PCI\VEN_8086&DEV_6FC9 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FC9" PCI\VEN_8086&DEV_6FCA = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FCA" PCI\VEN_8086&DEV_6FCB = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FCB" PCI\VEN_8086&DEV_6FCC = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FCC" PCI\VEN_8086&DEV_6FCD = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FCD" PCI\VEN_8086&DEV_6FCE = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FCE" PCI\VEN_8086&DEV_6FCF = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Power Control Unit - 6FCF" PCI\VEN_8086&DEV_6FD0 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 0 Thermal Control - 6FD0" PCI\VEN_8086&DEV_6FD1 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 1 Thermal Control - 6FD1" PCI\VEN_8086&DEV_6FD2 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 0 Error - 6FD2" PCI\VEN_8086&DEV_6FD3 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 1 Error - 6FD3" PCI\VEN_8086&DEV_6FD4 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 2 Thermal Control - 6FD4" PCI\VEN_8086&DEV_6FD5 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 3 Thermal Control - 6FD5" PCI\VEN_8086&DEV_6FD6 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 2 Error - 6FD6" PCI\VEN_8086&DEV_6FD7 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Memory Controller 1 - Channel 3 Error - 6FD7" PCI\VEN_8086&DEV_6FE0 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE0" PCI\VEN_8086&DEV_6FE1 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE1" PCI\VEN_8086&DEV_6FE2 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE2" PCI\VEN_8086&DEV_6FE3 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE3" PCI\VEN_8086&DEV_6FE4 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE4" PCI\VEN_8086&DEV_6FE5 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE5" PCI\VEN_8086&DEV_6FE6 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE6" PCI\VEN_8086&DEV_6FE7 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE7" PCI\VEN_8086&DEV_6FE8 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE8" PCI\VEN_8086&DEV_6FE9 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FE9" PCI\VEN_8086&DEV_6FEA = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FEA" PCI\VEN_8086&DEV_6FEB = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FEB" PCI\VEN_8086&DEV_6FEC = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FEC" PCI\VEN_8086&DEV_6FED = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FED" PCI\VEN_8086&DEV_6FEE = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FEE" PCI\VEN_8086&DEV_6FEF = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FEF" PCI\VEN_8086&DEV_6FF0 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF0" PCI\VEN_8086&DEV_6FF1 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF1" PCI\VEN_8086&DEV_6FF2 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF2" PCI\VEN_8086&DEV_6FF3 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF3" PCI\VEN_8086&DEV_6FF4 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF4" PCI\VEN_8086&DEV_6FF5 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF5" PCI\VEN_8086&DEV_6FF6 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF6" PCI\VEN_8086&DEV_6FF7 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF7" PCI\VEN_8086&DEV_6FF8 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF8" PCI\VEN_8086&DEV_6FF9 = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FF9" PCI\VEN_8086&DEV_6FFA = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FFA" PCI\VEN_8086&DEV_6FFB = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FFB" PCI\VEN_8086&DEV_6FFC = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FFC" PCI\VEN_8086&DEV_6FFD = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FFD" PCI\VEN_8086&DEV_6FFE = "Intel(R) Xeon(R) E7 v4/Xeon(R) E5 v4/Xeon(R) E3 v4/Xeon(R) D Caching Agent - 6FFE" Download: Intel Chipset Device Software 10.1.2.10 + 10.1.1.9 + 9.4.0.1027 WHQL http://turbobit.net http://startfiles.org http://gigapeta.com | |
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